The present technology relates to a solid-state imaging device and an electronic device that enable a reduction in the voltage of an AD conversion circuit. A solid-state imaging device includes: a plurality of pixels; a vertical signal line configured to output a pixel signal of the pixel; and a clipping circuit configured to limit a voltage of the vertical signal line to a predetermined voltage. The clipping circuit includes a transistor configured to generate the predetermined voltage in accordance with a voltage of a gate, and a sample holding circuit configured to hold a reset level of the pixel that is output to the vertical signal line, and input the reset level to the gate of the transistor. The present technology can be applied to a CMOS image sensor, for example.