Invention Grant
- Patent Title: Elimination method of parasitic capacitance and device
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Application No.: US15300254Application Date: 2016-08-12
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Publication No.: US10175812B2Publication Date: 2019-01-08
- Inventor: Feilin Ji , Xiaoping Tan
- Applicant: Wuhan China Star Optoelectronics Technology Co., Ltd.
- Applicant Address: CN Wuhan, Hubei
- Assignee: Wuhan China Star Optoelectronics Technology Co., Ltd
- Current Assignee: Wuhan China Star Optoelectronics Technology Co., Ltd
- Current Assignee Address: CN Wuhan, Hubei
- Agent Andrew C. Cheng
- Priority: CN201610628812 20160803
- International Application: PCT/CN2016/094894 WO 20160812
- International Announcement: WO2018/023831 WO 20180208
- Main IPC: G06F3/041
- IPC: G06F3/041 ; G02F1/1333 ; G06F3/044 ; G09G3/36

Abstract:
The disclosure discloses an elimination method of parasitic capacitance and a device. During a touch scanning period, inputting a first simulation signal to source electrode lines and inputting a second simulation signal to multiplex lines can eliminate parasitic capacitance. Waveforms of the first simulation signal and a touch scanning signal input in a common electrode are identical or similar, waveforms of the second simulation signal and the touch scanning signal input in the common electrode are similar, waveforms of the third simulation signal and the touch scanning signal input in the common electrode are similar, a second simulation waveform includes a first target high level, a second target high level, a first target low level and a second target low level that are generated by different modules, the first target high level>the second target high level>the first target low level>the second target low level.
Public/Granted literature
- US20180173359A1 ELIMINATION METHOD OF PARASITIC CAPACITANCE AND DEVICE Public/Granted day:2018-06-21
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