An arithmetic processing device includes: a first register configured to hold data to be used to execute an instruction; a second register configured to hold a portion of the data held in the first register; a computing circuit configured to execute computation using the data held in the second register; a first error detector configured to detect whether or not an error is included in the data to be transferred by the first register to the second register; a controller configured to interrupt the execution of the instruction if the first error detector detects the error in the data; and an error corrector configured to correct the error in the data held in the first register if the first error detector detects the error in the data.