An information processing device, includes: a reconfigurable integrated circuit that, by being loaded with code expressing a configuration of a circuit, functions as the circuit; a memory that stores information indicating that the code is loaded into the reconfigurable integrated circuit, and resource information indicating an unused region in which circuit generation is available inside the reconfigurable integrated circuit; and a processor that searches a translation lookaside buffer (TLB) in which a virtual address associated with the code is associated with a physical address of the memory, determines, when the virtual address hits in the TLB, that the code is loaded, and generates, when the virtual address does not hit in the TLB, the circuit expressed by the code in the unused region indicated by the resource information.