Invention Grant
- Patent Title: Semiconductor structure and fabrication method thereof
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Application No.: US15666838Application Date: 2017-08-02
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Publication No.: US10177246B2Publication Date: 2019-01-08
- Inventor: Xin Yun Xie
- Applicant: Semiconductor Manufacturing International (Shanghai) Corporation , Semiconductor Manufacturing International (Beijing) Corporation
- Applicant Address: CN Shanghai CN Beijing
- Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION,SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
- Current Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION,SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
- Current Assignee Address: CN Shanghai CN Beijing
- Agency: Anova Law Group, PLLC
- Priority: CN201610666918 20160812
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L21/265 ; H01L21/306 ; H01L21/762 ; H01L21/768 ; H01L29/06 ; H01L29/417 ; H01L29/423 ; H01L21/8234

Abstract:
A semiconductor structure and a method for fabricating the semiconductor structure are provided. The method includes providing a plurality of dummy gates on a substrate, a capping layer on each dummy gate, and a dielectric layer over the substrate, wherein the dielectric layer has a top surface above each dummy gate. The method also includes performing a first ion implantation process on the dielectric layer to form a first stop layer in the dielectric layer. A top surface of the first stop layer is above or coplanar with a top surface of each dummy gate. Further, the method includes performing a first planarization process on the capping layer and the dielectric layer to expose the top surface of each dummy gate. A removal rate of the first stop layer is smaller than a removal rate of the dielectric layer when performing the first planarization process.
Public/Granted literature
- US20180047831A1 SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF Public/Granted day:2018-02-15
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