Embodiments of the disclosure provide a method including: identifying a target feature in an integrated circuit (IC) layout not represented in a library, the library including a plurality of sub-resolution assist feature (SRAF) usefulness maps corresponding to a plurality of features and SRAFs in the IC layout; generating a usefulness map for the target feature with an artificial neural network (ANN), the generating being based on the target feature and the plurality of SRAF usefulness maps in the library; adding the target feature and the generated usefulness map to the library; selecting an SRAF insertion site for the target feature based on the generated usefulness map; and inserting an SRAF for the target feature into the IC layout at the selected SRAF insertion site.