A method for controlling a resistive memory device is described. The resistive memory device including a memory cell provided between a first interconnection and a second interconnection crossing the first interconnection, and the memory cell transitions reversibly between a first resistance state and a second resistance state. The method includes detecting a first current flowing through a memory cell by applying a first voltage between the first interconnection and the second interconnection; comparing a value of the first current with a first criteria value; and determining whether the memory cell is in the first resistance state or the second resistance state. The method further includes comparing the value of the first current with a second criteria value greater than the first criteria value; and setting a first flag for the memory cell when the value of the first current is greater than the second criteria value.