Invention Grant
- Patent Title: Semiconductor wafer and method
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Application No.: US14757896Application Date: 2015-12-24
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Publication No.: US10199216B2Publication Date: 2019-02-05
- Inventor: Clemens Ostermaier , Gerhard Prechtl , Oliver Haeberlen
- Applicant: Infineon Technologies Austria AG
- Applicant Address: AT Villach
- Assignee: Infineon Technologies Austria AG
- Current Assignee: Infineon Technologies Austria AG
- Current Assignee Address: AT Villach
- Agency: Murphy, Bilak & Homiller, PLLC
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L31/18 ; C30B33/08 ; C30B15/34 ; C30B29/40 ; H01L21/304 ; H01L21/306 ; H01L21/308 ; H01L29/06 ; H01L29/20
Abstract:
In an embodiment, a method includes treating an edge region of a wafer including a substrate having an upper surface and one or more epitaxial Group III nitride layers arranged on the upper surface of the substrate, so as to remove material including at least one Group III element from the edge region.
Public/Granted literature
- US20170186600A1 Semiconductor wafer and method Public/Granted day:2017-06-29
Information query
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