- Patent Title: Liner and barrier applications for subtractive metal integration
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Application No.: US15874793Application Date: 2018-01-18
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Publication No.: US10199235B2Publication Date: 2019-02-05
- Inventor: Hui-Jung Wu , Thomas Joseph Knisley , Nagraj Shankar , Meihua Shen , John Hoang , Prithu Sharma
- Applicant: Lam Research Corporation
- Applicant Address: US CA Fremont
- Assignee: Lam Research Corporation
- Current Assignee: Lam Research Corporation
- Current Assignee Address: US CA Fremont
- Agency: Weaver Austin Villeneuve & Sampson LLP
- Main IPC: H01L21/3213
- IPC: H01L21/3213 ; H01J37/32 ; H01L21/768 ; H01L23/532 ; C23C16/02 ; C23C16/04 ; C23C16/16 ; C23C16/54 ; H01L21/02

Abstract:
Methods and techniques for fabricating metal interconnects, lines, or vias by subtractive etching and liner deposition methods are provided. Methods involve depositing a blanket copper layer, removing regions of the blanket copper layer to form a pattern, treating the patterned metal, depositing a copper-dielectric interface material such that the copper-dielectric interface material adheres only to the patterned copper, depositing a dielectric barrier layer on the substrate, and depositing a dielectric bulk layer on the substrate.
Public/Granted literature
- US20180211846A1 LINER AND BARRIER APPLICATIONS FOR SUBTRACTIVE METAL INTEGRATION Public/Granted day:2018-07-26
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