Invention Grant
- Patent Title: Method of manufacturing a semiconductor device having a charge compensation region underneath a gate trench
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Application No.: US15251606Application Date: 2016-08-30
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Publication No.: US10199456B2Publication Date: 2019-02-05
- Inventor: Minghao Jin , Li Juin Yip , Oliver Blank , Martin Vielemeyer , Franz Hirler
- Applicant: Infineon Technologies Austria AG
- Applicant Address: AT Villach
- Assignee: Infineon Technologies Austria AG
- Current Assignee: Infineon Technologies Austria AG
- Current Assignee Address: AT Villach
- Agency: Murphy, Bilak & Homiller, PLLC
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/40 ; H01L29/66 ; H01L29/06 ; H01L21/306 ; H01L21/308 ; H01L21/266 ; H01L21/265 ; H01L29/10 ; H01L29/739

Abstract:
A method of forming a semiconductor device is provided. The device includes a semiconductor substrate having a main surface and a rear surface vertically spaced apart from the main surface, a first doped region, a second doped region and a third doped region. The third doped region is interposed between the first and second doped regions beneath the main surface. Field plate trenches having field plates vertically extend from the main surface to a bottom that is arranged in the first doped region. A gate trench having a gate electrode vertically extends from the main surface to the first doped region. A compensation zone vertically extends from the bottom of the gate trench deeper into the first doped region. The compensation zone is laterally aligned with the gate trench and is adjacent to the field plates along a cross-sectional plane of the device that is parallel to the main surface.
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