Invention Grant
- Patent Title: Low temperature poly-silicon transistor array substrate and fabrication method thereof, and display device
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Application No.: US15084802Application Date: 2016-03-30
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Publication No.: US10199506B2Publication Date: 2019-02-05
- Inventor: Xiaoyong Lu , Zheng Liu , Xiaolong Li , Dong Li , Huijuan Zhang , Liang Sun
- Applicant: BOE TECHNOLOGY GROUP CO., LTD.
- Applicant Address: CN Beijing
- Assignee: BOE TECHNOLOGY GROUP CO., LTD.
- Current Assignee: BOE TECHNOLOGY GROUP CO., LTD.
- Current Assignee Address: CN Beijing
- Agency: Nath, Goldberg & Meyer
- Agent Joshua B. Goldberg
- Priority: CN201510169378 20150410
- Main IPC: H01L29/786
- IPC: H01L29/786 ; H01L29/66

Abstract:
The embodiments of the present invention disclose a low temperature poly-silicon (LTPS) transistor array substrate and a method of fabricating the same, and a display device. The LTPS transistor array substrate comprises a substrate; a poly-silicon semiconductor active region provided on the substrate; a gate insulated from the poly-silicon semiconductor active region; and a dielectric spacer region provided on a side wall of the gate, wherein a portion of the poly-silicon semiconductor active region corresponding to the dielectric spacer region comprises a buffer region, and the dielectric spacer region surrounds the side wall of the gate and covers the buffer region.
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Information query
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