Semiconductor memory apparatus
Abstract:
A semiconductor memory apparatus of the technology includes a current sink circuit configured to allow a portion of a current flowing through a memory cell to flow to a negative voltage terminal in a read operation and a sense amplifier configured to detect data of the memory cell and a detection result in response to a sense amplifier enable signal in the read operation. The current sink circuit varies an amount of the current flowing to the negative voltage terminal in response to the sense amplifier enable signal.
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