Invention Grant
- Patent Title: Circuit substrate and semiconductor package structure
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Application No.: US15423788Application Date: 2017-02-03
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Publication No.: US10204852B2Publication Date: 2019-02-12
- Inventor: Yeh-Chi Hsu , Chen-Yueh Kung
- Applicant: VIA Alliance Semiconductor Co., Ltd.
- Applicant Address: CN Shanghai
- Assignee: VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Current Assignee: VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Current Assignee Address: CN Shanghai
- Agency: McClure, Qualey & Rodack, LLP
- Priority: TW103138138A 20141104
- Main IPC: H05K1/11
- IPC: H05K1/11 ; H01L23/498 ; H01L23/13 ; H01L23/14 ; H01L23/00

Abstract:
A circuit substrate for a chip bonding thereon includes a core substrate having a chip-side surface and a bump-side surface opposite to the chip-side surface, a first through via plug passing through the core substrate, a pad disposed on the bump-side surface, in contact with the first through via plug, and a first thickness enhancing conductive pattern disposed on a surface of the pad, which is away from the bump-side surface.
Public/Granted literature
- US20170148720A1 CIRCUIT SUBSTRATE AND SEMICONDUCTOR PACKAGE STRUCTURE Public/Granted day:2017-05-25
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