At acquisition of a first unit command signal RC(1) of which storage is completed and in a case that the ring buffer stores a part of a second unit command signal RC(2), the CPU acquires the first unit command signal and the part of the second unit command signal upon receiving a first interrupt signal BQ(1), and then separates the first unit command signal and the part of the second unit command signal from each other. When having received a second interrupt signal BQ(2), the CPU acquires the remaining of the second unit command signal, and combines the remaining of the second unit command signal and the part of the second unit command signal. Accordingly, the second unit command signal once separated is acquired as a signal having all data completed.