Invention Grant
- Patent Title: Memory structure
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Application No.: US14845304Application Date: 2015-09-04
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Publication No.: US10211150B2Publication Date: 2019-02-19
- Inventor: Shih-Hung Chen
- Applicant: MACRONIX INTERNATIONAL CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: MACRONIX INTERNATIONAL CO., LTD.
- Current Assignee: MACRONIX INTERNATIONAL CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: McClure, Qualey & Rodack, LLP
- Main IPC: H01L23/528
- IPC: H01L23/528 ; H01L29/792 ; H01L29/788 ; H01L27/115 ; G11C16/18 ; H01L27/11519 ; H01L27/11556 ; H01L27/11521 ; H01L27/11565 ; H01L27/11568 ; H01L27/11582 ; G11C16/08

Abstract:
A memory structure is provided. The memory structure comprises M array regions and N contact regions. M is an integer ≥2. N is an integer ≥M. Each array region is coupled to at least one contact region. Each contact region comprises a stair structure and a plurality of contacts. The stair structure comprises alternately stacked conductive layers and insulating layers. Each contact is connected to one conductive layer of the stair structure. Two array regions which are adjacent to each other are spatially separated by two contact regions, which are coupled to the two array regions, respectively.
Public/Granted literature
- US20170069567A1 MEMORY STRUCTURE Public/Granted day:2017-03-09
Information query
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