Invention Grant
- Patent Title: Wafer-based electronic component packaging
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Application No.: US14317613Application Date: 2014-06-27
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Publication No.: US10211172B2Publication Date: 2019-02-19
- Inventor: Anuranjan Srivastava , Khanh Tran
- Applicant: Maxim Integrated Products, Inc.
- Applicant Address: US CA San Jose
- Assignee: Maxim Integrated Products, Inc.
- Current Assignee: Maxim Integrated Products, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Advent, LLP
- Agent Kevin E. West
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L23/31 ; H01L21/56

Abstract:
A surface mount device includes at least one semiconductor device including an exposed top metal, an encapsulation layer partially encapsulating the at least one semiconductor device, and at least one end-termination cap on the surface mount device resulting in an electrical connection from a first side of the surface mount device to a second side of the surface mount device. In implementations, one process for fabricating the surface mount device includes dicing a finished device wafer in a scribe-line region, applying tape to a first side of the finished device wafer, backgrinding a second side of the finished device wafer, encapsulating the second side of the finished device wafer with an encapsulation layer, singulating the finished device wafer, and forming at least one wrap-around connection from a first side of the surface mount device to a second side of the surface mount device.
Public/Granted literature
- US20150262944A1 WAFER-BASED ELECTRONIC COMPONENT PACKAGING Public/Granted day:2015-09-17
Information query
IPC分类: