- Patent Title: Field effect transistor structure for reducing contact resistance
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Application No.: US15139365Application Date: 2016-04-27
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Publication No.: US10211205B2Publication Date: 2019-02-19
- Inventor: Brent R. Den Hartog , Eric J. Lukes , Matthew J. Paschal , Nghia V. Phan , Raymond A. Richetta , Patrick L. Rosno , Timothy J. Schmerbeck , Dereje G. Yilma
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Peter J. Edwards
- Main IPC: H01L27/092
- IPC: H01L27/092 ; H01L27/02 ; H01L29/417 ; H01L29/78

Abstract:
A circuit component comprises a row of transistors. The row may contain a first active FET with a source region and a drain region. The row may also contain a first active dummy FET that shares the source region and that also has a diffusion region. The row may also contain a second active FET and a second active dummy FET, positioned such that the active dummy FETs are located between the active FETs on the row. The row may also have an end positioned such that the first active dummy FET is between the end and the first active FET. A supply of current may be electrically connected to the source diffusion regions. A load region may be electrically connected to the drain region. The first active FET and the first active dummy FET may have gates that share a voltage source or that have their own voltage source.
Public/Granted literature
- US20170317082A1 FIELD EFFECT TRANSISTOR STRUCTURE FOR REDUCING CONTACT RESISTANCE Public/Granted day:2017-11-02
Information query
IPC分类: