Invention Grant
- Patent Title: Reading circuit of a long time constant circuit stage and corresponding reading method
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Application No.: US16151388Application Date: 2018-10-04
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Publication No.: US10217503B2Publication Date: 2019-02-26
- Inventor: Antonino Conte , Enrico Castaldo , Raul Andres Bianchi , Francesco La Rosa
- Applicant: STMicroelectronics S.r.l. , STMicroelectronics (Crolles 2) SAS , STMicroelectronics (Rousset) SAS
- Applicant Address: FR Crolles FR Rousset IT Agrate Brianza (MB)
- Assignee: STMicroelectronics (Crolles 2) SAS,STMicroelectronics (Rousset) SAS,STMicroelectronics S.r.l.
- Current Assignee: STMicroelectronics (Crolles 2) SAS,STMicroelectronics (Rousset) SAS,STMicroelectronics S.r.l.
- Current Assignee Address: FR Crolles FR Rousset IT Agrate Brianza (MB)
- Agency: Slater Matsil, LLP
- Priority: IT102016000067279 20160629
- Main IPC: G11C11/24
- IPC: G11C11/24 ; G04F10/10

Abstract:
A reading circuit for a charge-retention circuit stage is provided with a storage capacitor coupled between a first biasing terminal and a floating node, and a discharge element coupled between the floating node and a reference terminal. The reading circuit further has an operational amplifier having a first input terminal that is coupled to the floating node and receives a reading voltage, a second input terminal receives a reference voltage, and an output terminal on which it supplies an output voltage, the value of which is a function of the comparison between the reading voltage and the reference voltage and indicative of a residual charge in the storage capacitor. A shifting stage shifts the value of the reading voltage of the floating node, before the comparison is made between the reading voltage and the reference voltage for supplying the output voltage.
Public/Granted literature
- US20190035450A1 Reading Circuit of a Long time Constant Circuit Stage and Corresponding Reading Method Public/Granted day:2019-01-31
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