Invention Grant
- Patent Title: SGT-including pillar-shaped semiconductor device and method for producing the same
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Application No.: US15655168Application Date: 2017-07-20
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Publication No.: US10217865B2Publication Date: 2019-02-26
- Inventor: Fujio Masuoka , Nozomu Harada
- Applicant: Unisantis Electronics Singapore Pte. Ltd.
- Applicant Address: SG Singapore
- Assignee: UNISANTIS ELECTRONICS SINGAPORE PTE. LTD.
- Current Assignee: UNISANTIS ELECTRONICS SINGAPORE PTE. LTD.
- Current Assignee Address: SG Singapore
- Agency: Brinks Gilson & Lione
- Priority: WOPCT/JP2015/060763 20150406; WOPCT/JP2015/069689 20150708
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L27/11 ; H01L21/768 ; H01L23/522 ; H01L29/423 ; H01L29/66

Abstract:
A first contact hole is formed so as to extend to a NiSi layer as a lower wiring conductor layer connecting to an N+ layer of an SGT formed within a Si pillar, and so as to extend through a NiSi layer as an upper wiring conductor layer connecting to a gate TiN layer, and a NiSi layer as an intermediate wiring conductor layer connecting to an N+ layer. A second contact hole is formed so as to extend to the NiSi layer, and surround, in plan view, the first contact hole. An insulating SiO2 layer is formed on a side surface of the NiSi layer. A wiring metal layer in the contact holes connects the NiSi layer and the NiSi layer to each other.
Public/Granted literature
- US20170323969A1 SGT-INCLUDING PILLAR-SHAPED SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING THE SAME Public/Granted day:2017-11-09
Information query
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