- Patent Title: Partial redundancy elimination with a fixed number of temporaries
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Application No.: US15795861Application Date: 2017-10-27
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Publication No.: US10223089B1Publication Date: 2019-03-05
- Inventor: Steven J. Perron
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Tihon Poltavets
- Main IPC: G06F9/45
- IPC: G06F9/45 ; G06F9/44 ; G06F9/30 ; G06F8/41

Abstract:
A method for partial redundancy elimination with a fixed number of temporaries includes determining local data values of program code that describe a temporary memory location, a set of registers, and a set of basic blocks. The method determines global data values of the program code based on the determined local data values of the program code. The method removes a first load of the temporary memory location in a first basic block in the program code. The method adds a second load on a first edge from a second basic block out of the set of basic blocks to a third basic block out of the set of basic blocks in the program code. The method performs a register move on a second edge from the third basic block to the second basic block in the program code.
Public/Granted literature
- US20190065163A1 PARTIAL REDUNDANCY ELIMINATION WITH A FIXED NUMBER OF TEMPORARIES Public/Granted day:2019-02-28
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