Invention Grant
- Patent Title: Error rate reduction
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Application No.: US15046666Application Date: 2016-02-18
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Publication No.: US10223198B2Publication Date: 2019-03-05
- Inventor: Deping He , Sampath K. Ratnam
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Brooks, Cameron & Huebsch, PLLC
- Main IPC: G06F11/10
- IPC: G06F11/10 ; G11C29/52 ; H03M13/11 ; H03M13/15 ; H03M13/13 ; H03M13/00 ; H04L1/00 ; H03M13/29 ; H03M13/35 ; G11C29/04
Abstract:
The present disclosure includes apparatuses and methods for error rate reduction. One example method comprises adding an amount of error rate reduction (ERR) data to an amount of received user data, and writing the amount of user data along with the amount of ERR data to a memory.
Public/Granted literature
- US20170242747A1 ERROR RATE REDUCTION Public/Granted day:2017-08-24
Information query
