Invention Grant
- Patent Title: Selective bypassing of allocation in a cache
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Application No.: US15273270Application Date: 2016-09-22
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Publication No.: US10223278B2Publication Date: 2019-03-05
- Inventor: Shivam Priyadarshi , Brandon Harley Anthony Dwiel , Rami Mohammad A. Al Sheikh , Harold Wade Cain, III
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Muncy, Geissler, Olds & Lowe, P.C.
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F12/0888 ; G06F12/0811 ; G06F12/128 ; G06F12/126 ; G06F13/00 ; G06F13/28 ; G06F12/084

Abstract:
Systems and methods are directed to selectively bypassing allocation of cache lines in a cache. A bypass predictor table is provided with reuse counters to track reuse characteristics of cache lines, based on memory regions to which the cache lines belong in memory. A contender reuse counter provides an indication of a likelihood of reuse of a contender cache line in the cache pursuant to a miss in the cache for the contender cache line, and a victim reuse counter provides an indication of a likelihood of reuse for a victim cache line that will be evicted if the contender cache line is allocated in the cache. A decision whether to allocate the contender cache line in the cache or bypass allocation of the contender cache line in the cache is based on the contender reuse counter value and the victim reuse counter value.
Public/Granted literature
- US20170293565A1 SELECTIVE BYPASSING OF ALLOCATION IN A CACHE Public/Granted day:2017-10-12
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