Invention Grant
- Patent Title: Method for forming patterns of a semiconductor device
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Application No.: US15444381Application Date: 2017-02-28
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Publication No.: US10224213B2Publication Date: 2019-03-05
- Inventor: Kyungmun Byun , Sinhae Do , Badro Im
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si, Gyeonggi-Do
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si, Gyeonggi-Do
- Agency: F. Chau & Associates, LLC
- Priority: KR10-2016-0052145 20160428
- Main IPC: H01L21/308
- IPC: H01L21/308 ; H01L21/28 ; H01L21/3213

Abstract:
A method for forming patterns of a semiconductor device includes sequentially forming a hard mask layer, a sacrificial layer, and an anti-reflection layer on a substrate, the substrate including a cell region and a peripheral circuit region, patterning the sacrificial layer to form a first sacrificial pattern on the cell region and a second sacrificial pattern on the peripheral circuit region, forming spacers covering sidewalls of the first and second sacrificial patterns, and removing the first sacrificial pattern. The anti-reflection layer includes a lower anti-reflection layer and an upper anti-reflection layer which are formed of materials different from each other. In the patterning of the sacrificial layer, the anti-reflection layer is patterned to form a first anti-reflection pattern on the first sacrificial pattern and a second anti-reflection pattern on the second sacrificial pattern. The second anti-reflection pattern remains when the first sacrificial pattern is removed.
Public/Granted literature
- US20170316950A1 METHOD FOR FORMING PATTERNS OF A SEMICONDUCTOR DEVICE Public/Granted day:2017-11-02
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