Invention Grant
- Patent Title: Internal plasma grid for semiconductor fabrication
-
Application No.: US15055439Application Date: 2016-02-26
-
Publication No.: US10224221B2Publication Date: 2019-03-05
- Inventor: Harmeet Singh , Thorsten Lill , Vahid Vahedi , Alex Paterson , Monica Titus , Gowri Kamarthy
- Applicant: Lam Research Corporation
- Applicant Address: US CA Fremont
- Assignee: Lam Research Corporation
- Current Assignee: Lam Research Corporation
- Current Assignee Address: US CA Fremont
- Agency: Weaver Austin Villeneuve & Sampson LLP
- Main IPC: H01L21/3065
- IPC: H01L21/3065 ; H01L21/311 ; H01L21/3213 ; H01L21/67 ; H01J37/32

Abstract:
The embodiments disclosed herein pertain to improved methods and apparatus for etching a semiconductor substrate. A plasma grid assembly is positioned in a reaction chamber to divide the chamber into upper and lower sub-chambers. The plasma grid assembly may include one or more plasma grids having slots of a particular aspect ratio, which allow certain species to pass through from the upper sub-chamber to the lower sub-chamber. Where multiple plasma grids are used, one or more of the grids may be movable, allowing for tenability of the plasma conditions in at least the lower sub-chamber. In some cases, an electron-ion plasma is generated in the upper sub-chamber. Electrons that make it through the grid to the lower sub-chamber are cooled as they pass through. In some cases, this results in an ion-ion plasma in the lower sub-chamber.
Public/Granted literature
- US20160203990A1 INTERNAL PLASMA GRID FOR SEMICONDUCTOR FABRICATION Public/Granted day:2016-07-14
Information query
IPC分类: