Invention Grant
- Patent Title: Semiconductor device and its manufacturing method
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Application No.: US15648814Application Date: 2017-07-13
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Publication No.: US10224395B2Publication Date: 2019-03-05
- Inventor: Kazuki Yokota
- Applicant: RENESAS ELECTRONICS CORPORATION
- Applicant Address: JP Tokyo
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Tokyo
- Agency: McDermott Will & Emery LLP
- Priority: JP2016-139493 20160714
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L21/762 ; H01L23/535 ; H01L21/768

Abstract:
In an element isolation region defining an element formation region, there is formed an element isolation unit including an element isolation unit and the other element isolation unit. The other element isolation unit is arranged in a direction intersecting a direction in which the element isolation unit extends from the element isolation unit. The element isolation unit includes a sidewall oxide film formed in a trench, a titanium film, a titanium nitride film, and a tungsten film. The tungsten film is formed to cover the bottom surface of a trench in the element isolation unit and to close an opening end of a trench in the other element isolation unit. A plug is formed in contact with the tungsten film of the element isolation unit.
Public/Granted literature
- US20180019303A1 SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD Public/Granted day:2018-01-18
Information query
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