Invention Grant
- Patent Title: Closed-loop digital compensation scheme
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Application No.: US15581057Application Date: 2017-04-28
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Publication No.: US10224877B2Publication Date: 2019-03-05
- Inventor: Lei Zhu , Xin Zhao , John L. Melanson
- Applicant: Cirrus Logic International Semiconductor Ltd.
- Applicant Address: US TX Austin
- Assignee: Cirrus Logic, Inc.
- Current Assignee: Cirrus Logic, Inc.
- Current Assignee Address: US TX Austin
- Agency: Norton Rose Fulbright US LLP
- Main IPC: H03F3/38
- IPC: H03F3/38 ; H03F1/02 ; H03F1/56 ; H03F3/183 ; H03F3/217 ; H03G3/30 ; H03F1/30 ; H03F1/32 ; H03F3/187 ; H03M1/66

Abstract:
Resistor mismatch may be digitally compensated based on a known resistor mismatch, power supply information, and/or other operating parameters of the amplifier. The digital compensation may be applied to the digital input signal before conversion for processing and amplification in the analog domain. An amplifier with digital compensation for resistor mismatch may be used in a class-D amplifier with a closed loop and feedforward feedback. A class-D or other amplifier with digital compensation may be integrated with electronic devices such as mobile phones.
Public/Granted literature
- US20180212570A1 CLOSED-LOOP DIGITAL COMPENSATION SCHEME Public/Granted day:2018-07-26
Information query
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