Invention Grant
- Patent Title: Ratioed logic with a high impedance load
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Application No.: US15520698Application Date: 2014-10-30
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Publication No.: US10224935B2Publication Date: 2019-03-05
- Inventor: Ning Ge , Boon Bing Ng , Leong Yap Chia
- Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
- Applicant Address: US TX Spring
- Assignee: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
- Current Assignee: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
- Current Assignee Address: US TX Spring
- Agency: HP Inc. Patent Department
- International Application: PCT/US2014/063160 WO 20141030
- International Announcement: WO2016/068938 WO 20160506
- Main IPC: H03K19/18
- IPC: H03K19/18 ; H03K19/173 ; H03K3/45 ; H03K19/0944 ; G11C13/00
Abstract:
A device having ratioed logic with a high impedance load is described. The device includes a pull-down network coupled between a first voltage and an output. The device also includes a high impedance load coupled between a second voltage and the output. The high impedance load being smaller than a transistor of the pull-down network.
Public/Granted literature
- US20170317680A1 RATIOED LOGIC WITH A HIGH IMPEDANCE LOAD Public/Granted day:2017-11-02
Information query
IPC分类:
