Invention Grant
- Patent Title: Unified paging scheme for dense and sparse translation tables on flash storage systems
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Application No.: US15197116Application Date: 2016-06-29
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Publication No.: US10229048B2Publication Date: 2019-03-12
- Inventor: Ajith Kumar Battaje , Tanay Goel , Sandeep Sharma , Saurabh Manchanda , Arun Kumar Medapati
- Applicant: HGST Netherlands B.V.
- Applicant Address: US CA San Jose
- Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
- Current Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
- Current Assignee Address: US CA San Jose
- Agency: Loza & Loza, LLP
- Agent Gabriel Fitch
- Main IPC: G06F12/02
- IPC: G06F12/02 ; G06F12/1009 ; G06F17/30

Abstract:
A system comprising a processor and a memory storing instructions that, when executed, cause the system to receive a first translation table entry for a logical block, map the first translation table entry to a first dump unit, the first dump unit included in an array of dump units, identify a second translation table entry for the logical block in the first dump unit, the second translation table entry also being stored in a storage device, and generate a linked list in the storage device from the second translation table entry associated with the first dump unit, the linked list identifying previous translation table entries associated with the logical block.
Public/Granted literature
- US20180004650A1 Unified Paging Scheme for Dense and Sparse Translation Tables on Flash Storage Systems Public/Granted day:2018-01-04
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