Invention Grant
- Patent Title: Electromigration check in layout design using compiled rules library
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Application No.: US15411839Application Date: 2017-01-20
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Publication No.: US10229240B2Publication Date: 2019-03-12
- Inventor: Kaushik Patra
- Applicant: Mentor Graphics Corporation
- Applicant Address: US OR Wilsonville
- Assignee: Mentor Graphics Corporation
- Current Assignee: Mentor Graphics Corporation
- Current Assignee Address: US OR Wilsonville
- Agency: Mentor Graphics Corporation
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
This application discloses a computing system to receive electromigration design rules defining characteristics of integrated circuits configured to cause electromigration, generate a rules library including machine code implementing electromigration design rule checks for the characteristics defined by the electromigration design rules, and perform the electromigration design rule checks on a layout design of an integrated circuit by executing the machine code implementing the electromigration design rule checks on structures of the integrated circuit described in the layout design. The computing system can generate the rules library at runtime by parsing the electromigration design rules to identify the characteristics of integrated circuits configured to cause electromigration, translating the electromigration design rules into an intermediate format based on the identified characteristics of integrated circuits, expanding macro instructions in the intermediate file into the source code, and compiling the source code into machine code for population into the rules library.
Public/Granted literature
- US20180210995A1 ELECTROMIGRATION CHECK IN LAYOUT DESIGN USING COMPILED RULES LIBRARY Public/Granted day:2018-07-26
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