Invention Grant
- Patent Title: Semiconductor device capable of reducing power consumption
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Application No.: US15920919Application Date: 2018-03-14
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Publication No.: US10229725B2Publication Date: 2019-03-12
- Inventor: Atsushi Kawasumi
- Applicant: Kabushiki Kaisha Toshiba
- Applicant Address: JP Minato-ku
- Assignee: KABUSHIKI KAISHA TOSHIBA
- Current Assignee: KABUSHIKI KAISHA TOSHIBA
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2014-156721 20140731
- Main IPC: G11C11/16
- IPC: G11C11/16 ; G11C5/14

Abstract:
According to one embodiment, a semiconductor device includes a first transistor of a first conductivity type, and a first logical circuit. The first transistor of the first conductivity type is connected between a first node to which a power supply voltage is applied and a second node. The first transistor is turned on in the initial stage of an active cycle, and is turned off by applying the power supply voltage to the second node. The first logical circuit is driven by the power supply voltage applied to the second node. The first logical circuit outputs a voltage which is lower than the power supply voltage in the active cycle based on an input signal supplied thereto.
Public/Granted literature
- US20180247686A1 SEMICONDUCTOR DEVICE CAPABLE OF REDUCING POWER CONSUMPTION Public/Granted day:2018-08-30
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