Invention Grant
- Patent Title: Semiconductor integrated circuit device
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Application No.: US15919525Application Date: 2018-03-13
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Publication No.: US10229733B2Publication Date: 2019-03-12
- Inventor: Makoto Yabuuchi , Hidehiro Fujiwara
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Koutou-ku, Tokyo
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Koutou-ku, Tokyo
- Agency: Sughrue Mion, PLLC
- Priority: JP2013-154883 20130725
- Main IPC: G11C17/12
- IPC: G11C17/12 ; G11C11/417 ; G11C11/418 ; G11C11/419

Abstract:
There is provided a semiconductor integrated circuit device that can generate a unique ID with the suppression of overhead. When a unique ID is generated, the potential of a word line of a memory cell in an SRAM is raised above the power supply voltage of the SRAM, and then lowered below the power supply voltage of the SRAM. When the potential of the word line is above the power supply voltage of the SRAM, the same data is supplied to both the bit lines of the memory cell. Thereby, the memory cell in the SRAM is put into an undefined state and then changed so as to hold data according to characteristics of elements or the like configuring the memory cell. In the manufacture of the SRAM, there occur variations in characteristics of elements or the like configuring the memory cell. Accordingly, the memory cell in the SRAM holds data according to variations occurring in the manufacture.
Public/Granted literature
- US10304527B2 Semiconductor integrated circuit device Public/Granted day:2019-05-28
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