Time domain signal processing (TDSP) encodes information into time rather than voltage with high efficiency. Circuit level design techniques can also reduce the area and energy consumption of TDSP. Design examples on both conventional signal processing blocks and emerging facial recognition applications can be used to demonstrate the potential of the techniques. On a 45 nm CMOS technology, more than about 45% area and energy reduction can be simultaneously achieved from TDSP compared with standard CMOS techniques in emerging applications.