Invention Grant
- Patent Title: Placement of vias in printed circuit board circuits
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Application No.: US15385161Application Date: 2016-12-20
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Publication No.: US10231325B1Publication Date: 2019-03-12
- Inventor: David P. Chengson , Edward C. Chang , Ranjeeth Doppalapudi , Santosh Kumar Pappu
- Applicant: Juniper Networks, Inc.
- Applicant Address: US CA Sunnyvale
- Assignee: Juniper Networks, Inc.
- Current Assignee: Juniper Networks, Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: Shumaker & Sieffert, P.A.
- Main IPC: H05K1/02
- IPC: H05K1/02 ; H05K1/18 ; H05K1/11 ; H05K3/40 ; H05K3/00

Abstract:
In some examples, an electronic device includes a printed circuit board (PCB) device that includes a first trace electrically connected to a first pad of a first trace via on a first layer and a second trace electrically connected to a second pad of a second trace via on a second layer. In some examples, the PCB device also includes four ground pads on the first layer and an antipad surrounding the two trace vias, where a first ground pad is positioned between the first trace and the second trace, where the first ground pad and the second ground pad are approximately symmetrically positioned about a perpendicular bisector of a line from the first pad to the second pad, and wherein the third ground pad and the fourth ground pad are approximately symmetrically positioned about the perpendicular bisector of the line from the first pad to the second pad.
Information query