- Patent Title: Integrated circuit testing using on-chip electrical test structure
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Application No.: US15225807Application Date: 2016-08-01
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Publication No.: US10234499B1Publication Date: 2019-03-19
- Inventor: Martin W. Dvorak , Ben Keppeler
- Applicant: KEYSIGHT TECHNOLOGIES, INC.
- Applicant Address: US CA Santa Rosa
- Assignee: Keysight Technologies, Inc.
- Current Assignee: Keysight Technologies, Inc.
- Current Assignee Address: US CA Santa Rosa
- Main IPC: G01R31/28
- IPC: G01R31/28

Abstract:
Techniques and test structures for determining reliability and performance characteristics of an integrated circuit (IC) device are disclosed. For example, an IC device includes multiple functional elements and multiple test elements. The test elements are electrically coupled in series between a first test port and a second test port. A method of testing the IC device includes applying an electrical stimulus between the first test port and the second test port, measuring a parametric value in response to the electrical stimulus, comparing the parametric value and a statistical value, and determining a pass or fail status of the IC device. The statistical value is representative of a predicted reliability of the IC device.
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