Invention Grant
- Patent Title: Scheduling and dispatch of GPGPU workloads
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Application No.: US14142681Application Date: 2013-12-27
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Publication No.: US10235732B2Publication Date: 2019-03-19
- Inventor: Jayanth N. Rao , Michal Mrozek
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Main IPC: G06T1/20
- IPC: G06T1/20 ; G06F9/50

Abstract:
A method and system are described herein for an optimization technique on two aspects of thread scheduling and dispatch when the driver is allowed to pick the scheduling attributes. The present techniques rely on an enhanced GPGPU Walker hardware command and one dimensional local identification generation to maximize thread residency.
Public/Granted literature
- US20150187040A1 SCHEDULING AND DISPATCH OF GPGPU WORKLOADS Public/Granted day:2015-07-02
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