Invention Grant
- Patent Title: Method of making semiconductor integrated circuit device relating to resistance characteristics
-
Application No.: US15871723Application Date: 2018-01-15
-
Publication No.: US10236180B2Publication Date: 2019-03-19
- Inventor: Jin Ha Kim
- Applicant: SK hynix Inc.
- Applicant Address: KR Icheon-si Gyeonggi-do
- Assignee: Sk hynix Inc.
- Current Assignee: Sk hynix Inc.
- Current Assignee Address: KR Icheon-si Gyeonggi-do
- Agency: William Park & Associates Ltd.
- Priority: KR10-2016-0070952 20160608
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L21/02 ; H01L21/768 ; H01L21/822 ; H01L21/28 ; H01L21/8234 ; H01L27/11551 ; H01L27/11556 ; H01L27/11568 ; H01L27/1157 ; H01L27/11578 ; H01L27/11582 ; H01L29/04 ; H01L29/423 ; H01L29/792

Abstract:
A semiconductor integrated circuit device may include a structure, a first capping layer, a channel layer and a second capping layer. The structure may have an opening formed in the structure. The first capping layer may be formed in the opening of the structure. The channel layer may be arranged between the structure and the first capping layer. The second capping layer may be arranged on the channel layer and the first capping layer.
Public/Granted literature
- US20180138191A1 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE RELATING TO RESISTANCE CHARACTERISTICS Public/Granted day:2018-05-17
Information query
IPC分类: