Invention Grant
- Patent Title: Manufacturing system and method for forming a clean interface between a functional layer and a two-dimensional layeyed semiconductor
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Application No.: US15665486Application Date: 2017-08-01
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Publication No.: US10236181B2Publication Date: 2019-03-19
- Inventor: Chiu-Chuan Liao , Yi-Ping Lin , Chao-Hui Yeh
- Applicant: BEST CHAMPION TECHNOLOGY CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: BEST CHAMPION TECHNOLOGY CO., LTD.
- Current Assignee: BEST CHAMPION TECHNOLOGY CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Li & Cai Intellectual Property (USA) Office
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L21/027 ; H01L29/66

Abstract:
A manufacturing system and a method for forming a clean interface between a functional layer and a 2D layered semiconductor are provided herein. In the steps of the method, the substrate equipped with the 2D layered semiconductor is exposed to a reaction gas, and a stimulus is applied to the reaction gas to generate active particles having higher selectivity toward contaminants on the exposed surface of the 2D layered semiconductor so that the contaminants can be decomposed and removed. Additionally, the contaminants can be removed without damage to the 2D layered semiconductor. A functional layer is in-situ deposited to be in contact with the 2D layered semiconductor. Without the contaminants, a clean interface between the functional layer and the 2D layered semiconductor can be obtained and the 2D layered semiconductor can exhibit better electrical properties.
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