Invention Grant
- Patent Title: Semiconductor device having semiconductor chip with large and small irregularities on upper and lower side surface portions thereof
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Application No.: US15885457Application Date: 2018-01-31
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Publication No.: US10236269B2Publication Date: 2019-03-19
- Inventor: Makoto Takesawa
- Applicant: SII Semiconductor Corporation
- Applicant Address: JP
- Assignee: ABLIC INC.
- Current Assignee: ABLIC INC.
- Current Assignee Address: JP
- Agency: Adams & Wilks
- Priority: JP2014-025799 20140213
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/544 ; H01L21/44 ; H01L21/48 ; H01L23/00 ; H01L23/31 ; B23K26/53 ; B23K103/00
Abstract:
A semiconductor device has a semiconductor chip adhesively bonded to a die pad. An area having large irregularities is formed on an upper side surface of the semiconductor chip to be covered by an encapsulating resin, and an area having small irregularities is formed on a lower side surface of the semiconductor chip, thereby improving adhesive strength between the semiconductor chip and the encapsulating resin and preventing penetration of moisture from outside.
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