Invention Grant
- Patent Title: Stacking integrated circuits containing serializer and deserializer blocks using through silicon via
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Application No.: US13192217Application Date: 2011-07-27
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Publication No.: US10236275B2Publication Date: 2019-03-19
- Inventor: Farhang Yazdani
- Applicant: Farhang Yazdani
- Applicant Address: US CA San Jose
- Assignee: BroadPak Corporation
- Current Assignee: BroadPak Corporation
- Current Assignee Address: US CA San Jose
- Agency: Aslan Law, P.C.
- Main IPC: H05K1/11
- IPC: H05K1/11 ; H01L25/065 ; H01L23/48 ; H01L23/66 ; H01L23/00
Abstract:
A die stack having a second die is stacked vertically on top of a first die. A first plurality of test pads is located along a first edge of the first die. A second plurality of test pads is located along a second edge of the first die. The first edge of the first die is parallel to the second edge of the first die. A third plurality of test pads is located along a first edge of the second die. A fourth plurality of test pads is located along a second edge of the second die. The first edge of the second die is parallel to the second edge of the second die. The first edge of the first die and the second edge of the first die are perpendicular to the first edge of the second die and the second edge of the second die.
Public/Granted literature
- US20110278737A1 Stacking Integrated Circuits containing Serializer and Deserializer Blocks using Through Silicon Via Public/Granted day:2011-11-17
Information query
