Invention Grant
- Patent Title: Integrated circuit comprising an antifuse structure and method of realizing
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Application No.: US15610323Application Date: 2017-05-31
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Publication No.: US10242944B2Publication Date: 2019-03-26
- Inventor: Pascal Fornara , Christian Rivero
- Applicant: STMicroelectronics (Rousset) SAS
- Applicant Address: FR Rousset
- Assignee: STMicroelectronics (Rousset) SAS
- Current Assignee: STMicroelectronics (Rousset) SAS
- Current Assignee Address: FR Rousset
- Agency: Slater Matsil, LLP
- Priority: FR1660777 20161108
- Main IPC: H01L23/525
- IPC: H01L23/525 ; H01L21/768 ; H01L23/522

Abstract:
An integrated circuit includes a substrate; an interconnect portion disposed over the substrate, the interconnect portion comprising multiple metallization levels separated by an insulating region; and an antifuse structure coated with a portion of the insulating region, the antifuse structure comprising a beam held at two different points by two arms, a body, and an antifuse insulating zone, the beam, the body and the arms being metal and located within a same metallization level, the body and the beam mutually making contact via the antifuse insulating zone, the antifuse insulating zone configured to undergo breakdown in the presence of a breakdown potential difference between the body and the beam.
Public/Granted literature
- US20180130740A1 INTEGRATED CIRCUIT COMPRISING AN ANTIFUSE STRUCTURE AND METHOD OF REALIZING Public/Granted day:2018-05-10
Information query
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