Invention Grant
- Patent Title: Dynamic substrate biasing for extended voltage operation
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Application No.: US16018958Application Date: 2018-06-26
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Publication No.: US10242979B1Publication Date: 2019-03-26
- Inventor: Willliam Ernest Edwards
- Applicant: NXP USA, INC.
- Applicant Address: US TX Austin
- Assignee: NXP USA, Inc.
- Current Assignee: NXP USA, Inc.
- Current Assignee Address: US TX Austin
- Main IPC: H01L27/02
- IPC: H01L27/02 ; H01L29/866 ; H01L29/06 ; H01L29/10 ; H01L23/62 ; H01L27/12 ; H01L49/02 ; H02H9/04

Abstract:
A device includes an integrated circuit (IC) layer, an insulative layer such as a buried oxide (BOX) layer, a substrate layer separated from the IC layer by the insulative layer, and a set of protective components such as a set of Zener diodes or a Zener stack coupled to the IC layer to protect the IC layer from transient electric events such as an electrostatic discharge (ESD), an inductive flyback, and a back electromotive force (back-EMF) event. The Zener stack has a Zener breakdown voltage greater than a breakdown voltage of the IC layer. An effective bias voltage has a voltage level less than the breakdown voltage of the IC layer. The Zener diode or Zener stack may be coupled to one or more isolation structures of the IC layer. The isolation structures separate the IC layer into electrically distinct portions or wells in which other electric components are formed.
Information query
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