Invention Grant
- Patent Title: Semiconductor fin isolation by a well trapping fin portion
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Application No.: US15331351Application Date: 2016-10-21
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Publication No.: US10242980B2Publication Date: 2019-03-26
- Inventor: Henry K. Utomo , Kangguo Cheng , Ramachandra Divakaruni , Ravikumar Ramachandran , Huiling Shang , Reinaldo A. Vega
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Scully, Scott, Murphy & Presser, P.C.
- Agent Steven J. Meyers
- Main IPC: H01L27/088
- IPC: H01L27/088 ; H01L29/78 ; H01L29/66 ; H01L29/06 ; H01L29/16 ; H01L29/161 ; H01L29/165 ; H01L29/167 ; H01L21/8238 ; H01L27/092 ; H01L21/8234 ; H01L29/08 ; H01L29/10

Abstract:
A bulk semiconductor substrate including a first semiconductor material is provided. A well trapping layer including a second semiconductor material and a dopant is formed on a top surface of the bulk semiconductor substrate. The combination of the second semiconductor material and the dopant within the well trapping layer is selected such that diffusion of the dopant is limited within the well trapping layer. A device semiconductor material layer including a third semiconductor material can be epitaxially grown on the top surface of the well trapping layer. The device semiconductor material layer, the well trapping layer, and an upper portion of the bulk semiconductor substrate are patterned to form at least one semiconductor fin. Semiconductor devices formed in each semiconductor fin can be electrically isolated from the bulk semiconductor substrate by the remaining portions of the well trapping layer.
Public/Granted literature
- US20170040320A1 SEMICONDUCTOR FIN ISOLATION BY A WELL TRAPPING FIN PORTION Public/Granted day:2017-02-09
Information query
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