Disclosed are a low-temperature polycrystalline silicon thin film transistor (LTPS TFT), a method for fabricating the same, an array substrate, a display panel, and a display device. The LTPS TFT includes an active layer, a source, a drain, a gate, and a gate insulating layer which are arranged on a substrate. The gate insulating layer is arranged between the active layer and the gate, and a graphene oxide layer which is arranged between the active layer and the gate insulating layer. Since the graphene oxide layer is arranged between the active layer and the gate insulating layer, the interface between the active layer and the gate insulating layer of polycrystalline (P-Si) has a reduced roughness and interfacial defect density, and a pre-cleaning process is not necessary for the gate insulating layer.