In one embodiment, a method includes selectively invalidating data stored in at least one cache line of a cache memory of a processor in response to a determination that a predetermined amount of time has passed since the at least one cache line was last accessed. The predetermined amount of time is shorter than an average round-trip time for the processor to process a plurality of blocks of data stored sequentially to a ring buffer. In other embodiments, methods, systems, and computer program products are described for efficient use of cache memory using an expiration timer.