Invention Grant
- Patent Title: Connection arrangements for integrated lateral diffusion field effect transistors
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Application No.: US15899911Application Date: 2018-02-20
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Publication No.: US10249759B2Publication Date: 2019-04-02
- Inventor: Shanghui Larry Tu , Michael A. Stuber , Befruz Tasbas , Stuart B. Molin , Raymond Jiang
- Applicant: Silanna Asia Pte Ltd
- Applicant Address: SG Singapore
- Assignee: Silanna Asia Pte Ltd
- Current Assignee: Silanna Asia Pte Ltd
- Current Assignee Address: SG Singapore
- Agency: The Mueller Law Office, P.C.
- Main IPC: H01L29/10
- IPC: H01L29/10 ; H01L29/786 ; H01L27/12 ; H01L29/78 ; H01L29/06 ; H01L21/84 ; H01L21/74 ; H01L29/66 ; H01L21/48 ; H01L21/768 ; H01L23/48 ; H01L23/495 ; H01L23/00 ; H01L29/417 ; H01L23/522 ; H01L23/535 ; H01L25/00

Abstract:
In an active layer over a semiconductor substrate, a semiconductor device has a first lateral diffusion field effect transistor (LDFET) that includes a source, a drain, and a gate, and a second LDFET that includes a source, a drain, and a gate. The source of the first LDFET and the drain of the second LDFET are electrically connected to a common node. A first front-side contact and a second front-side contact are formed over the active layer, and a substrate contact electrically connected to the semiconductor substrate is formed. Each of the first front-side contact, the second front-side contact, and the substrate contact is electrically connected to a different respective one of the drain of the first LDFET, the source of the second LDFET, and the common node.
Public/Granted literature
- US20180240876A1 CONNECTION ARRANGEMENTS FOR INTEGRATED LATERAL DIFFUSION FIELD EFFECT TRANSISTORS Public/Granted day:2018-08-23
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