Invention Grant
- Patent Title: Addressable test chip test system
-
Application No.: US15859306Application Date: 2017-12-29
-
Publication No.: US10254339B2Publication Date: 2019-04-09
- Inventor: Fan Lan , Shenzhi Yang , Yongjun Zheng , Weiwei Pan
- Applicant: Semitronix Corporation
- Applicant Address: CN Hangzhou
- Assignee: Semitronix Corporation
- Current Assignee: Semitronix Corporation
- Current Assignee Address: CN Hangzhou
- Agency: Syncoda LLC
- Agent Feng Ma
- Priority: CN201611260100 20161230
- Main IPC: G01R31/317
- IPC: G01R31/317 ; G01R31/28

Abstract:
To improve test efficiency of addressable test chips, an addressable test chip test system includes a test equipment, a probe card and an addressable test chip, the test equipment connects to the addressable test chip through the probe card to constitute a test path, the test system includes a new type of address register, which can provide two test modes for users according to user's needs. A new type of high density addressable test chip can accommodate DUTs of more than 1000/mm2.
Public/Granted literature
- US20180188324A1 ADDRESSABLE TEST CHIP TEST SYSTEM Public/Granted day:2018-07-05
Information query