Invention Grant
- Patent Title: Low inrush circuit for power up and deep power down exit
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Application No.: US15938840Application Date: 2018-03-28
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Publication No.: US10254812B1Publication Date: 2019-04-09
- Inventor: Mohandas Sivadasan , Jayant Ashokkumar , Iulian Gradinariu , Abhisek Dey
- Applicant: Cypress Semiconductor Corporation
- Applicant Address: US CA San Jose
- Assignee: Cypress Semiconductor Corporation
- Current Assignee: Cypress Semiconductor Corporation
- Current Assignee Address: US CA San Jose
- Main IPC: G06F1/3203
- IPC: G06F1/3203 ; G11C5/14 ; H03K19/177

Abstract:
Systems, methods, and devices for providing power to low energy circuits include inrush circuits. Devices include a regulator that includes at least one driver device configured to generate a first current associated with a load comprising a low energy integrated circuit. Devices also include a bias generator configured to generate a second current to charge a load capacitor coupled with a power terminal of the low energy integrated circuit. Devices further include an enable circuit configured to enable the bias generator and disable the regulator responsive to a load voltage being below a threshold voltage, and further configured to enable the regulator to generate the first current and disable the bias generator responsive to the load voltage being above the threshold voltage.
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