A view definition analyzer maps a plurality of timing views for a circuit design into compatibility groups having shared operating conditions of their respective process corners. An ETM generator then extracts an extracted timing model from a block of the circuit design for each compatibility group, containing timing arcs representing each combination of interface path in the circuit block and timing view in the compatibility group, where at least one timing arc in the ETM is a merged version of multiple timing arcs for an interface path across multiple timing views in the compatibility group. Timing arcs are merged when each timing characteristic in a first timing arc matches, within a tolerance threshold, a corresponding timing characteristic in a second timing arc. The ETM may then be used to model any timing view in the compatibility group. The ETM generator thus produces a minimal set of extracted timing models.