A memory device may include voltage regulation circuitry configured to supply a voltage signal between a high signal and a low signal. The memory device may include a first data line configured to provide a first charge to the voltage regulation circuitry during a first mode of operation of the memory device. The memory device may include a second data line configured to draw a second charge from the voltage regulation circuitry to control a voltage on the second data line during a second mode of operation of the memory device.