Invention Grant
- Patent Title: DRAM core architecture with wide I/Os
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Application No.: US15658047Application Date: 2017-07-24
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Publication No.: US10255968B2Publication Date: 2019-04-09
- Inventor: Jongsik Na , Taehyung Jung
- Applicant: OMNIVISION TECHNOLOGIES, INC.
- Applicant Address: US CA Santa Clara
- Assignee: OmniVision Technologies, Inc.
- Current Assignee: OmniVision Technologies, Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Christensen O'Connor Johnson Kindness PLLC
- Main IPC: G11C5/06
- IPC: G11C5/06 ; G11C11/4096 ; G11C11/4074 ; G11C11/4094

Abstract:
A dynamic random-access memory (DRAM) for use with a display includes a plurality of capacitive elements coupled to store one or more bits of data, and a plurality of switches where at least one individual switch in the plurality of switches is coupled to an individual capacitive element in the plurality of capacitive elements. A plurality of input/output (I/O) bit lines including 32 or more input/output bit lines is coupled to read out the data from the plurality of capacitive elements. A plurality of column select lines is coupled to enable readout of the plurality of capacitive elements.
Public/Granted literature
- US20190027209A1 DRAM CORE ARCHITECTURE WITH WIDE I/OS Public/Granted day:2019-01-24
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